TinyFPGA

Rayslogic Home Propeller II Propeller I TinyFPGA To P2Eval TinyFPGA 4-bit CPU ULX3S FPGA Board

TinyFPGA is a ~$20 FPGA board (A series is based on the MachXO2 FPGA chip from Lattice)
- There are a few versions being advertised now: A1, AX2, BX, and EX
- Looks like A1 was the first version, with XO2-256 chip in QFN-32 form
- The AX2 (also called A2) is also available now, based on XO2-1200, also in QFN-32 form
- The BX and EX are more powerful and include a USB programmer. But, these don't look to be available until 2022
Great thing about TinyFPGA is that everything is open source, including board designs and programmer code
You use Lattice Diamond to generate the JEDEC programming file (.jed)
- Lattice Diamond is NOT open source and required you to apply for a free license
- To get the license, you need to run ipconfig /all in DOS prompt to figure your internet adapter physical address
- License doesn't work over Remote Desktop :(
Can be programmed using custom, ~$10, programming board for A1 or AX2 or with the ~$200 Lattice programmer
- The TinyFPGA programmer works fine but does require a Python program to program it whereas it looks like the Lattice one works directly with Lattice Diamond
- There are some ~$25 knock off programmers on Amazon.com that appear like they would also work
The TinyFPGA programmer is based on the X and is open source design and code
For now, the AX2 looks the most interesting due to simplicity and low cost
- Looks like a great place to start for someone learning FPGA

Getting Started with AX2 (probably applies to A1 too)
The official A-series gettings started page is very good (backed up here)
Note: You need to supply 3.3 V power to the AX2 somehow.
- The guide shows how to use a 3.3 V regulator to do this from a 5 V supply
- They really should have some capacitors on either side of that regulator!
First step is to install Diamond Lattice (and get and install license file)
- Note: You must "run as administrator" the setup program
Next, follow the guide to start a new project from the template on github, or use my blink project files here
- Note: I've used a "~" to invert the output signals, making the active low instead of active high
In Diamond Lattice, double-click on "JEDEC File" to get the green check mark showing it made the .jed file as shown below
Next, open that .jed file with the Python 2.7 programming tool (installer copied here)
- Note: Programmer has to be connected and attached to powered AX2 board for program to work!
Setting the system clock
- The blink example uses the lowest possible clock setting of 2.08 MHz
- The clock is set by this code:
- This is using the internal 133 MHz oscillator (only 5% accuracy), that is then divided down
- You can see above the commented out code to switch to 133 MHz, you can change by uncommenting this and commenting out the line above it
- Here is the table of frequencies usable this way: (from the the MachXO2 sysCLOCK PLL Design and Usage Guide)
Using a Schematic (instead of Verilog .v file)
- The example above is in Verilog text language, but would like to explore the graphical schematic
- Found a college course lab that shows how to do this
- Made this project from this that adds an AND gate to the blink project, and comments out the counter output
Using an external oscillator
- It appears you use an external oscillator to generate a more precise clock (see this note)
- Also, the AX2 version has a PLL that looks like it could be used to increase or decrease that external oscillator's frequency.
Other interesting notes:
Useful looking things on the web:
- FPGA Fun
Can we make our own loader hardware and/or software
- Found an open source .svf loader on Github, Lib(X)SVF. Diamond has a "Deployment Tool" that can turn the .jed file into a .svf file
- Using an FT231x looks like a good option too. Found some info on that at fleasystems and openfpgaloader
- Using Visual Studio Community, set up a TinyFPGALoader Python project and started hacking that. Got it to allow P2's FT231X chip to be an option, but decoding the serial output is proving to be a challenge. All the info is there in Github to make that happen though.