Place & Route TRACE Report
Loading design for application trce from file template_a2_impl.ncd.
Design name: Schematic1
NCD version: 3.3
Vendor: LATTICE
Device: LCMXO2-1200HC
Package: QFN32
Performance: 4
Loading device for application trce from file 'xo2c1200.nph' in environment: C:/lscc/diamond/3.12/ispfpga.
Package Status: Final Version 1.44.
Performance Hardware Data Status: Final Version 34.4.
Setup and Hold Report
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Lattice TRACE Report - Setup, Version Diamond (64-bit) 3.12.1.454
Thu Nov 04 15:22:42 2021
Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved.
Copyright (c) 1995 AT&T Corp. All rights reserved.
Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved.
Copyright (c) 2001 Agere Systems All rights reserved.
Copyright (c) 2002-2020 Lattice Semiconductor Corporation, All rights reserved.
Report Information
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Command line: trce -v 10 -gt -sethld -sp 4 -sphld m -o template_a2_impl.twr -gui -msgset C:/FPGA/SchematicTest1/promote.xml template_a2_impl.ncd template_a2_impl.prf
Design file: template_a2_impl.ncd
Preference file: template_a2_impl.prf
Device,speed: LCMXO2-1200HC,4
Report level: verbose report, limited to 10 items per preference
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Preference Summary
Default path enumeration(0 errors) 2 items scored, 0 timing errors detected.
Default net enumeration(0 errors) 3 items scored, 0 timing errors detected.
BLOCK ASYNCPATHS
BLOCK RESETPATHS
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================================================================================
Preference: Default path enumeration
2 items scored, 0 timing errors detected.
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Report: 8.604ns delay pin9_jtgnb to pin11_scl
Name Fanout Delay (ns) Site Resource
PADI_DEL --- 1.372 26.PAD to 26.PADDI pin9_jtgnb
ROUTE 1 2.281 26.PADDI to R2C12D.A0 pin9_jtgnb_c
CTOF_DEL --- 0.495 R2C12D.A0 to R2C12D.F0 SLICE_0
ROUTE 1 1.008 R2C12D.F0 to 28.PADDO pin11_scl_c
DOPAD_DEL --- 3.448 28.PADDO to 28.PAD pin11_scl
--------
8.604 (61.8% logic, 38.2% route), 3 logic levels.
Report: 8.269ns delay pin10_sda to pin11_scl
Name Fanout Delay (ns) Site Resource
PADI_DEL --- 1.372 27.PAD to 27.PADDI pin10_sda
ROUTE 1 1.946 27.PADDI to R2C12D.C0 pin10_sda_c
CTOF_DEL --- 0.495 R2C12D.C0 to R2C12D.F0 SLICE_0
ROUTE 1 1.008 R2C12D.F0 to 28.PADDO pin11_scl_c
DOPAD_DEL --- 3.448 28.PADDO to 28.PAD pin11_scl
--------
8.269 (64.3% logic, 35.7% route), 3 logic levels.
Report: 8.604ns is the maximum delay for this preference.
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Preference: Default net enumeration
3 items scored, 0 timing errors detected.
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Report: 2.281ns maximum delay on pin9_jtgnb_c
Delays Connection(s)
2.281ns 26.PADDI to R2C12D.A0
Report: 1.946ns maximum delay on pin10_sda_c
Delays Connection(s)
1.946ns 27.PADDI to R2C12D.C0
Report: 1.008ns maximum delay on pin11_scl_c
Delays Connection(s)
1.008ns R2C12D.F0 to 28.PADDO
Report: 2.281ns is the maximum delay for this preference.
Report Summary
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Preference | Constraint| Actual|Levels
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| | |
Default path enumeration | 0.000 ns| 8.604 ns| 0
| | |
Default net enumeration | 0.000 ns| 2.281 ns| 0
| | |
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All preferences were met.
Clock Domains Analysis
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Found 0 clocks:
Timing summary (Setup):
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Timing errors: 0 Score: 0
Cumulative negative slack: 0
Constraints cover 2 paths, 3 nets, and 3 connections (100.00% coverage)
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