/* Verilog module instantiation template generated by SCUBA Diamond (64-bit) 3.12.1.454 */
/* Module Version: 5.4 */
/* Tue Nov 23 12:07:01 2021 */

/* parameterized module instance */
EBR_ROM_IP2 __ (.Address( ), .OutClock( ), .OutClockEn( ), .Reset( ), 
    .Q( ));
