//Implementing a 4-bit counter, like 74183 chip
//mostly copying from here: http://web.mit.edu/6.111/www/s2004/LECTURES/l5.pdf

module CNT_74163 
	(
	input [3:0] A,  //input A, B, C, D
	input LOADn,  //Load (active low)
	input CLRn,  //Clear (active low)
	input P, //Enable
	input T, //Enable
	input CLK,
	//Outputs need to be registers to be inside always block, but trying without first, meaning async logic...
	output reg [3:0] Q,  //the 4-bit output 
	output RCO  //Ripple carry out
	);
	
	initial Q= 4'b0000;
	
	always @ (posedge CLK)
	begin
		if (~CLRn) 
			Q<=4'b0000;
		else if (~LOADn)
			Q<=A;
		else if (P&T)
			Q<=Q+4'b0001;
	end
	
	assign RCO= ((Q==4'b1111)&T);
			
endmodule	