/* Verilog module instantiation template generated by SCUBA Diamond (64-bit) 3.12.1.454 */
/* Module Version: 5.4 */
/* Sat Nov 20 19:20:21 2021 */

/* parameterized module instance */
EBR_ROM_IP __ (.Address( ), .OutClock( ), .OutClockEn( ), .Reset( ), 
    .Q( ));
